[all-commits] [llvm/llvm-project] 2f1fe1: [DAGCombiner] sink target-supported FP<->int cast ...

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2f1fe1864d2516f0f5d818140994caf795ccc9aa
      https://github.com/llvm/llvm-project/commit/2f1fe1864d2516f0f5d818140994caf795ccc9aa
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-05-06 (Wed, 06 May 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/X86/avx-shift.ll
    M llvm/test/CodeGen/X86/concat-cast.ll

  Log Message:
  -----------
  [DAGCombiner] sink target-supported FP<->int cast op after concat vectors

Try to combine N short vector cast ops into 1 wide vector cast op:
concat (cast X), (cast Y)... -> cast (concat X, Y...)

This is part of solving PR45794:
https://bugs.llvm.org/show_bug.cgi?id=45794

As noted in the code comment, this is uglier than I was hoping because
the opcode determines whether we pass the source or destination type
to isOperationLegalOrCustom(). Also IIUC, there's no way to validate
what the other (dest or src) type is. Without the extra legality check
on that, there's an ARM regression test in:
test/CodeGen/ARM/isel-v8i32-crash.ll
...that will crash trying to lower an unsupported v8f32 to v8i16.

Differential Revision: https://reviews.llvm.org/D79360