[all-commits] [llvm/llvm-project] e53d48: [X86][AVX] combineVectorSignBitsTruncation - avoid...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e53d4869a0d862934f8c74e4b74feb2b3430186a
      https://github.com/llvm/llvm-project/commit/e53d4869a0d862934f8c74e4b74feb2b3430186a
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-05-05 (Tue, 05 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/known-signbits-vector.ll
    M llvm/test/CodeGen/X86/min-legal-vector-width.ll

  Log Message:
  -----------
  [X86][AVX] combineVectorSignBitsTruncation - avoid complex vXi64->vXi32 PACKSS truncations (PR45794)

Unless we're truncating an 'all-bits' result, using PACKSS for vXi64->vXi32 truncation causes problems with later combines as ComputeNumSignBits struggles to see through BITCASTs to smaller types. If we don't use PACKSS in these cases then we fallback to shuffles which are usually just as good.