[all-commits] [llvm/llvm-project] ffdda4: [Target][ARM] Add PerformVSELECTCombine for MVE In...

Pierre van Houtryve via All-commits all-commits at lists.llvm.org
Tue May 5 02:04:34 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ffdda495f79a3147c4b351b323235ec429cc4f7d
      https://github.com/llvm/llvm-project/commit/ffdda495f79a3147c4b351b323235ec429cc4f7d
  Author: Pierre-vh <pierre.vanhoutryve at arm.com>
  Date:   2020-05-05 (Tue, 05 May 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/test/CodeGen/Thumb2/mve-pred-or.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll

  Log Message:
  -----------
  [Target][ARM] Add PerformVSELECTCombine for MVE Integer Ops

This patch adds an implementation of PerformVSELECTCombine in the
ARM DAG Combiner that transforms vselect(not(cond), lhs, rhs) into
vselect(cond, rhs, lhs).

Normally, this should be done by the target-independent DAG Combiner,
but it doesn't handle the kind of constants that we generate, so we
have to reimplement it here.

Differential Revision: https://reviews.llvm.org/D77712


  Commit: d5eb7ffa3372e33eb0a598b451236fbdddcbcc4a
      https://github.com/llvm/llvm-project/commit/d5eb7ffa3372e33eb0a598b451236fbdddcbcc4a
  Author: Pierre-vh <pierre.vanhoutryve at arm.com>
  Date:   2020-05-05 (Tue, 05 May 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
    M llvm/test/CodeGen/Thumb2/mve-pred-or.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll

  Log Message:
  -----------
  [Target][ARM] Fold or(A, B) more aggressively for I1 vectors

This patch makes the folding of or(A, B) into not(and(not(A), not(B)))
more agressive for I1 vector. This only affects Thumb2 MVE and improves
codegen, because it removes a lot of msr/mrs instructions on VPR.P0.

This patch also adds a xor(vcmp) -> !vcmp fold for MVE.

Differential Revision: https://reviews.llvm.org/D77202


Compare: https://github.com/llvm/llvm-project/compare/48aebfc908ba...d5eb7ffa3372


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