[all-commits] [llvm/llvm-project] 6601b6: [mlir][StandardToSPIRV] Emulate bitwidths not supp...

[Han-Chung Wang via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 6601b65aedd093cb62549ff9e8f39872d0b55499
      https://github.com/llvm/llvm-project/commit/6601b65aedd093cb62549ff9e8f39872d0b55499
  Author: Hanhan Wang <hanchung at google.com>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M mlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
    M mlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir

  Log Message:
  -----------
  [mlir][StandardToSPIRV] Emulate bitwidths not supported for load op.

Summary:
The current implementation in SPIRVTypeConverter just unconditionally turns
everything into 32-bit if it doesn't meet the requirements of extensions or
capabilities. In this case, we can load a 32-bit value and then do bit
extraction to get the value.

Differential Revision: https://reviews.llvm.org/D78974