[all-commits] [llvm/llvm-project] 880713: [ARM] Only produce qadd8b under hasV6Ops

[David Green via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 8807139026b64ac40163bb255dad38a1d8054f08
      https://github.com/llvm/llvm-project/commit/8807139026b64ac40163bb255dad38a1d8054f08
  Author: David Green <david.green at arm.com>
  Date:   2020-04-27 (Mon, 27 Apr 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/test/CodeGen/ARM/sadd_sat.ll

  Log Message:
  -----------
  [ARM] Only produce qadd8b under hasV6Ops

When compiling for a arm5te cpu from clang, the +dsp attribute is set.
This meant we could try and generate qadd8 instructions where we would
end up having no pattern. I've changed the condition here to be hasV6Ops
&& hasDSP, which is what other parts of ARMISelLowering seem to use for
similar instructions.

Fixed PR45677.

Differential Revision: https://reviews.llvm.org/D78877


  Commit: 7a076418dd31dc1ed1d5e88357d9c3e2918c7973
      https://github.com/llvm/llvm-project/commit/7a076418dd31dc1ed1d5e88357d9c3e2918c7973
  Author: David Green <david.green at arm.com>
  Date:   2020-04-27 (Mon, 27 Apr 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMInstrNEON.td
    M llvm/lib/Target/ARM/ARMScheduleA57.td

  Log Message:
  -----------
  [ARM] Replace hasNoSchedulingInfo with UnsupportedFeatures in the A57 schedule

hasNoSchedulingInfo should be used for Pseudo's and other instructions
that are never expected to be scheduled. This removes the flag from new
ARM instructions, instead fixing the A57 schedule by marking the related
architecture features as unsupported.


Compare: https://github.com/llvm/llvm-project/compare/1a0d46608131...7a076418dd31