[all-commits] [llvm/llvm-project] 7f4ff7: [x86] use vector instructions to lower even more F...

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 7f4ff782d406390208b7845c15383941eb4e2dc8
      https://github.com/llvm/llvm-project/commit/7f4ff782d406390208b7845c15383941eb4e2dc8
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-04-25 (Sat, 25 Apr 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/ftrunc.ll

  Log Message:
  -----------
  [x86] use vector instructions to lower even more FP->int->FP casts

This is another enhancement to D77895/D78362
to avoid a round-trip from XMM->GPR->XMM.
This time we handle the case of starting/ending with different FP types
but always with signed i32 as the intermediate value.
I think this covers all of the faux vector optimization possibilities
for pre-AVX512.

There is at least 1 other transform mentioned in PR36617:
https://bugs.llvm.org/show_bug.cgi?id=36617#c19
...where we fold an 'fpext' into a preceding 'sitofp'. I think we will
want to handle that earlier (DAGCombiner or instcombine) because that's
a target-independent optimization.

Differential Revision: https://reviews.llvm.org/D78758