[all-commits] [llvm/llvm-project] 35e6a9: AMDGPU: Break read2/write2 search range on a memor...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 35e6a9c8397e9550382961f2e020987982e9ccd7
      https://github.com/llvm/llvm-project/commit/35e6a9c8397e9550382961f2e020987982e9ccd7
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-04-24 (Fri, 24 Apr 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
    A llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll

  Log Message:
  -----------
  AMDGPU: Break read2/write2 search range on a memory fence

This is to fix performance regressions introduced by
86c944d790728891801778b8d98c2c65a83f36a5.

The old search would collect all potentially mergeable instructions in
the entire block. In this case, the same address is written in
multiple places in the block on the other side of a fence. When sorted
by offset, the two unmergeable, identical addresses would be next to
each other and the merge would give up.

Break the search space when we encounter an instruction we won't be
able to merge across. This will keep the identical addresses in
different merge attempts.

This may also improve compile time by reducing the merge list size.