[all-commits] [llvm/llvm-project] 7631af: [AMDGPU] Skip generating cache invalidating instru...

[Piotr Sobczak via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 7631af3af2799cdc8963d5c1d8f4261f6442b3ea
      https://github.com/llvm/llvm-project/commit/7631af3af2799cdc8963d5c1d8f4261f6442b3ea
  Author: Piotr Sobczak <Piotr.Sobczak at amd.com>
  Date:   2020-04-24 (Fri, 24 Apr 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-amdpal.ll

  Log Message:
  -----------
  [AMDGPU] Skip generating cache invalidating instructions on AMDPAL

Summary:
Frontend guarantees that coherent accesses have
corresponding cache policy bits set (glc, dlc).
Therefore there is no need for extra instructions
that invalidate cache.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78800