[all-commits] [llvm/llvm-project] 5c7a2c: [Hexagon] Fix result word order when bitcasting ve...

[Krzysztof Parzyszek via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 5c7a2cfac110b85962135a70d8b8c6d286758dd8
      https://github.com/llvm/llvm-project/commit/5c7a2cfac110b85962135a70d8b8c6d286758dd8
  Author: Krzysztof Parzyszek <kparzysz at quicinc.com>
  Date:   2020-04-23 (Thu, 23 Apr 2020)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
    A llvm/test/CodeGen/Hexagon/isel-hvx-pred-bitcast-order.ll

  Log Message:
  -----------
  [Hexagon] Fix result word order when bitcasting vector pred to int64/128