[all-commits] [llvm/llvm-project] 002164: [SveEmitter] Add builtins for FP conversions

[sdesmalen-arm via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 002164461b52e0ff13fa677a535991f89da0f633
      https://github.com/llvm/llvm-project/commit/002164461b52e0ff13fa677a535991f89da0f633
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2020-04-23 (Thu, 23 Apr 2020)

  Changed paths:
    M clang/include/clang/Basic/TargetBuiltins.h
    M clang/include/clang/Basic/arm_sve.td
    M clang/lib/CodeGen/CGBuiltin.cpp
    A clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c
    A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c
    A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c
    A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c
    A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c
    M clang/utils/TableGen/SveEmitter.cpp

  Log Message:
  -----------
  [SveEmitter] Add builtins for FP conversions

This adds the flag IsOverloadCvt which tells CGBulitin to use
the result type and the type of the last operand as the
overloaded types for the LLVM IR intrinsic.

This also adds the flag IsFPConvert, which is needed to avoid
converting the predicate of the operation from svbool_t to
a predicate with fewer lanes, as the LLVM IR intrinsics use
the <vscale x 16 x i1> as the predicate.

Reviewers: SjoerdMeijer, efriedma

Reviewed By: efriedma

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78239