[all-commits] [llvm/llvm-project] cceb63: [x86] use vector instructions to lower more FP->in...

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: cceb630a07cc0852f81cb2a44aef8f248504bd0f
      https://github.com/llvm/llvm-project/commit/cceb630a07cc0852f81cb2a44aef8f248504bd0f
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-04-19 (Sun, 19 Apr 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/ftrunc.ll
    M llvm/test/CodeGen/X86/isint.ll
    M llvm/test/CodeGen/X86/setoeq.ll

  Log Message:
  -----------
  [x86] use vector instructions to lower more FP->int->FP casts

This is an enhancement to D77895 to avoid another
round-trip from XMM->GPR->XMM. This time we handle
the case of starting/ending with an f64 and casting
to signed i32 as the intermediate value.

It's a bit more involved than I initially assumed
because we need to use target-specific opcodes to
represent the non-standard cast ops.

Differential Revision: https://reviews.llvm.org/D78362