[all-commits] [llvm/llvm-project] cabfcf: [ARM] Fix conditions for lowering to S[LR]I
Petre-Ionut Tudor via All-commits
all-commits at lists.llvm.org
Fri Apr 17 09:21:38 PDT 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: cabfcf840a9d15d92466c6774953d3aa399cde92
https://github.com/llvm/llvm-project/commit/cabfcf840a9d15d92466c6774953d3aa399cde92
Author: Petre-Ionut Tudor <petre-ionut.tudor at arm.com>
Date: 2020-04-17 (Fri, 17 Apr 2020)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-sli-sri-opt.ll
Log Message:
-----------
[ARM] Fix conditions for lowering to S[LR]I
Summary:
Fixed wrong conditions for generating (S[LR]I X, Y, C2) from
(or (and X, BvecC1), (lsl Y, C2)) and added ISel nodes to lower to S[LR]I. The
optimisation is also enabled by default now.
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D77387
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