[all-commits] [llvm/llvm-project] 4bd186: [PowerPC] Exploit the rldicl + rldicl when and wit...

[QingShan Zhang via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 4bd186c0ff76063de9de5507e1e512f7ab4372f1
      https://github.com/llvm/llvm-project/commit/4bd186c0ff76063de9de5507e1e512f7ab4372f1
  Author: QingShan Zhang <qshanz at cn.ibm.com>
  Date:   2020-04-17 (Fri, 17 Apr 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    M llvm/test/CodeGen/PowerPC/2016-04-17-combine.ll
    M llvm/test/CodeGen/PowerPC/Frames-dyn-alloca.ll
    M llvm/test/CodeGen/PowerPC/and-mask.ll
    M llvm/test/CodeGen/PowerPC/cmpb.ll
    M llvm/test/CodeGen/PowerPC/setcc-logic.ll

  Log Message:
  -----------
  [PowerPC] Exploit the rldicl + rldicl when and with mask

If we are and the constant like 0xFFFFFFC00000, for now, we are using several
instructions to generate this 48bit constant and final an "and". However, we
could exploit it with two rotate instructions.

       MB          ME               MB+63-ME
+----------------------+     +----------------------+
|0000001111111111111000| ->  |0000000001111111111111|
+----------------------+     +----------------------+
 0                    63      0                    63
Rotate left ME + 1 bit first, and then, mask it with (MB + 63 - ME, 63),
finally, rotate back. Notice that, we need to round it with 64 bit for the
wrapping case.

Reviewed by: ChenZheng, Nemanjai

Differential Revision: https://reviews.llvm.org/D71831