[all-commits] [llvm/llvm-project] cb5dc3: TableGen/GlobalISel: Fix constraining REG_SEQUENCE...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: cb5dc3765bddc4e6bcd92e588c33cfa8424eb437
      https://github.com/llvm/llvm-project/commit/cb5dc3765bddc4e6bcd92e588c33cfa8424eb437
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-04-14 (Tue, 14 Apr 2020)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
    M llvm/test/TableGen/GlobalISelEmitterRegSequence.td
    M llvm/utils/TableGen/GlobalISelEmitter.cpp

  Log Message:
  -----------
  TableGen/GlobalISel: Fix constraining REG_SEQUENCE operands

This was hitting the default instruction constraint code which uses
the register classes in the instruction def, which REG_SEQUENCE does
not have.

Fixes not constraining the register class for AMDGPU fneg/fabs
patterns, which would fail when the use was another generic,
unconstrained instruction.

Another oddity I noticed is that the temporary registers are created
with an unnecessary, but incorrect 16-bit LLT but this shouldn't
matter.

I'm also still unclear why root and sub-instructions have to be
handled differently.


  Commit: cc149172dab22e404e74b3dba9abee1e9416af8e
      https://github.com/llvm/llvm-project/commit/cc149172dab22e404e74b3dba9abee1e9416af8e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-04-14 (Tue, 14 Apr 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix selection of scalar f64 G_FABS

This wasn't covered by existing tablegen patterns, but also suffers
the same issues as G_FNEG. Workaround them by manually selecting, like
G_FNEG.


Compare: https://github.com/llvm/llvm-project/compare/229e392b4edb...cc149172dab2