[all-commits] [llvm/llvm-project] d04db4: [x86] use vector instructions to lower FP->int->FP...

[RotateRight via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: d04db4825a4d5f7fe298811a9a1644ae87748c6c
      https://github.com/llvm/llvm-project/commit/d04db4825a4d5f7fe298811a9a1644ae87748c6c
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-04-12 (Sun, 12 Apr 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/ftrunc.ll

  Log Message:
  -----------
  [x86] use vector instructions to lower FP->int->FP casts

As discussed in PR36617:
https://bugs.llvm.org/show_bug.cgi?id=36617#c13
...we can avoid the likely slow round-trip from XMM to GPR to XMM
by using the vector versions of the convert instructions.

Based on experimental results from recent Intel/AMD chips, we don't
need to worry about triggering denorm stalls while operating on
garbage data in the high lanes with convert instructions, so this is
expected to always be as good or better perf than the scalar
instruction equivalent. FP exceptions are also not a concern because
strict code should not be using the regular SDAG opcodes.

Differential Revision: https://reviews.llvm.org/D77895