[all-commits] [llvm/llvm-project] a17de6: [X86][SSE] truncateVectorWithPACK - upper undef fo...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a17de6b91cffc6edf2126d4ac75234e06bf33925
      https://github.com/llvm/llvm-project/commit/a17de6b91cffc6edf2126d4ac75234e06bf33925
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-04-05 (Sun, 05 Apr 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
    M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
    M llvm/test/CodeGen/X86/vector-trunc-packus.ll
    M llvm/test/CodeGen/X86/vector-trunc-ssat.ll
    M llvm/test/CodeGen/X86/vector-trunc-usat.ll

  Log Message:
  -----------
  [X86][SSE] truncateVectorWithPACK - upper undef for 128->64 packing

If we're packing from 128-bits to 64-bits then we don't need the RHS argument. This helps with register allocation, especially as we avoid repeating a use of the input value.