[all-commits] [llvm/llvm-project] e8dcb6: AMDGPU: Remove redundant virtual

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e8dcb6d05e0f6da085214826209973408756ff03
      https://github.com/llvm/llvm-project/commit/e8dcb6d05e0f6da085214826209973408756ff03
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-04-03 (Fri, 03 Apr 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h

  Log Message:
  -----------
  AMDGPU: Remove redundant virtual


  Commit: 178050c3ba119d13155ea6487332661a0eee3eb1
      https://github.com/llvm/llvm-project/commit/178050c3ba119d13155ea6487332661a0eee3eb1
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-04-03 (Fri, 03 Apr 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h

  Log Message:
  -----------
  AMDGPU: Use Register in more places


  Commit: 30ebafaa56846dc0f1607a6a8d41c96fcdc717cb
      https://github.com/llvm/llvm-project/commit/30ebafaa56846dc0f1607a6a8d41c96fcdc717cb
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-04-03 (Fri, 03 Apr 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/lib/CodeGen/PeepholeOptimizer.cpp
    M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
    M llvm/lib/CodeGen/TargetInstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
    M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
    M llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
    M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
    M llvm/lib/Target/Lanai/LanaiInstrInfo.h
    M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
    M llvm/lib/Target/PowerPC/PPCInstrInfo.h
    M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
    M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86InstrInfo.h

  Log Message:
  -----------
  CodeGen: Convert some TII hooks to use Register


  Commit: ea397a76f56fda7883f0104789d2084001409a49
      https://github.com/llvm/llvm-project/commit/ea397a76f56fda7883f0104789d2084001409a49
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-04-03 (Fri, 03 Apr 2020)

  Changed paths:
    M llvm/include/llvm/Support/MathExtras.h

  Log Message:
  -----------
  Support: Add specializations for reverseBits to use builtin


Compare: https://github.com/llvm/llvm-project/compare/5d14c7b6d1fc...ea397a76f56f