[all-commits] [llvm/llvm-project] 389704: [PhaseOrdering] add shuffle tests based on D40633; ...

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 389704cc601bef026a4000ecf6ed81eed2a7c326
      https://github.com/llvm/llvm-project/commit/389704cc601bef026a4000ecf6ed81eed2a7c326
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-04-03 (Fri, 03 Apr 2020)

  Changed paths:
    A llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll

  Log Message:
  -----------
  [PhaseOrdering] add shuffle tests based on D40633; NFC

We got some of the potential optimizations with D76727 and D76844.
There are 2 likely enhancements that we could add to -vector-combine
to get most of the remaining cases:
1. Allow bitcasted shuffle mask narrowing (widen the elements).
2. Combine shuffle-of-shuffle into a single shuffle.

This is already partly handled by the x86 backend, but the
tests here show that we still miss some of the potential
combines.