[all-commits] [llvm/llvm-project] 84aa6c: [Transforms][SROA] Promote allocas with mem2reg fo...

[Cullen Rhodes via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 84aa6cf1a9fe7c2d1c35b27ba6fbf1ee36a09a71
      https://github.com/llvm/llvm-project/commit/84aa6cf1a9fe7c2d1c35b27ba6fbf1ee36a09a71
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2020-04-01 (Wed, 01 Apr 2020)

  Changed paths:
    M llvm/lib/Transforms/Scalar/SROA.cpp
    A llvm/test/Transforms/SROA/scalable-vectors.ll

  Log Message:
  -----------
  [Transforms][SROA] Promote allocas with mem2reg for scalable types

Summary:
Aggregate types containing scalable vectors aren't supported and as far
as I can tell this pass is mostly concerned with optimisations on
aggregate types, so the majority of this pass isn't very useful for
scalable vectors.

This patch modifies SROA such that mem2reg is run on allocas with
scalable types that are promotable, but nothing else such as slicing is
done.

The use of TypeSize in this pass has also been updated to be explicitly
fixed size. When invoking the following methods in DataLayout:

    * getTypeSizeInBits
    * getTypeStoreSize
    * getTypeStoreSizeInBits
    * getTypeAllocSize

we now called getFixedSize on the resultant TypeSize. This is quite an
extensive change with around 50 calls to these functions, and also the
first change of this kind (being explicit about fixed vs scalable
size) as far as I'm aware, so feedback welcome.

A test is included containing IR with scalable vectors that this pass is
able to optimise.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D76720