[all-commits] [llvm/llvm-project] 1ee6ec: Remove "mask" operand from shufflevector.

[Eli Friedman via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1ee6ec2bf370fbd1d93f34c8b56741a9d3f22ed2
      https://github.com/llvm/llvm-project/commit/1ee6ec2bf370fbd1d93f34c8b56741a9d3f22ed2
  Author: Eli Friedman <efriedma at quicinc.com>
  Date:   2020-03-31 (Tue, 31 Mar 2020)

  Changed paths:
    M clang/lib/CodeGen/CGExpr.cpp
    M llvm/include/llvm/ADT/ArrayRef.h
    M llvm/include/llvm/Analysis/ConstantFolding.h
    M llvm/include/llvm/Analysis/InstructionSimplify.h
    M llvm/include/llvm/Analysis/TargetFolder.h
    M llvm/include/llvm/IR/ConstantFolder.h
    M llvm/include/llvm/IR/Constants.h
    M llvm/include/llvm/IR/IRBuilder.h
    M llvm/include/llvm/IR/IRBuilderFolder.h
    M llvm/include/llvm/IR/Instructions.h
    M llvm/include/llvm/IR/NoFolder.h
    M llvm/include/llvm/IR/PatternMatch.h
    M llvm/lib/Analysis/ConstantFolding.cpp
    M llvm/lib/Analysis/InstructionSimplify.cpp
    M llvm/lib/Analysis/TargetTransformInfo.cpp
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/Analysis/VectorUtils.cpp
    M llvm/lib/AsmParser/LLParser.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/ExecutionEngine/Interpreter/Execution.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/IR/ConstantFold.cpp
    M llvm/lib/IR/ConstantFold.h
    M llvm/lib/IR/Constants.cpp
    M llvm/lib/IR/ConstantsContext.h
    M llvm/lib/IR/Core.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/MVETailPredication.cpp
    M llvm/lib/Target/X86/X86PartialReduction.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
    M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
    M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
    M llvm/lib/Transforms/Scalar/GVN.cpp
    M llvm/lib/Transforms/Scalar/GVNSink.cpp
    M llvm/lib/Transforms/Scalar/NewGVN.cpp
    M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/unittests/IR/PatternMatch.cpp

  Log Message:
  -----------
  Remove "mask" operand from shufflevector.

Instead, represent the mask as out-of-line data in the instruction. This
should be more efficient in the places that currently use
getShuffleVector(), and paves the way for further changes to add new
shuffles for scalable vectors.

This doesn't change the syntax in textual IR. And I don't currently plan
to change the bitcode encoding in this patch, although we'll probably
need to do something once we extend shufflevector for scalable types.

I expect that once this is finished, we can then replace the raw "mask"
with something more appropriate for scalable vectors.  Not sure exactly
what this looks like at the moment, but there are a few different ways
we could handle it.  Maybe we could try to describe specific shuffles.
Or maybe we could define it in terms of a function to convert a fixed-length
array into an appropriate scalable vector, using a "step", or something
like that.

Differential Revision: https://reviews.llvm.org/D72467