[all-commits] [llvm/llvm-project] 2641ba: AMDGPU/GlobalISel: Round up image operations with ...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2641ba52a9c66d1d83e25646228a2574f3c22773
      https://github.com/llvm/llvm-project/commit/2641ba52a9c66d1d83e25646228a2574f3c22773
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-03-30 (Mon, 30 Mar 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Round up image operations with 5, 6 or 7 addresses

The instruction definitions are missing for these register types, so
round up to 8 like the DAG.