[all-commits] [llvm/llvm-project] 8206c5: [X86] Add isAnyZero shuffle mask helper

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 8206c50cdec1551cf6e51da2bc492b8daaf80e1d
      https://github.com/llvm/llvm-project/commit/8206c50cdec1551cf6e51da2bc492b8daaf80e1d
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-03-29 (Sun, 29 Mar 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] Add isAnyZero shuffle mask helper


  Commit: fe0723dc9d45acfa4511961b208b7817b09297ec
      https://github.com/llvm/llvm-project/commit/fe0723dc9d45acfa4511961b208b7817b09297ec
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-03-29 (Sun, 29 Mar 2020)

  Changed paths:
    M clang/include/clang/AST/PrettyPrinter.h

  Log Message:
  -----------
  Fix -Wdocumentation warning. NFC.

gcc was misinterpreting the template code snippet as html.


  Commit: 9c8ec99c80a5ad9b21d424d77fb19f825319b284
      https://github.com/llvm/llvm-project/commit/9c8ec99c80a5ad9b21d424d77fb19f825319b284
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-03-29 (Sun, 29 Mar 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-reduce-mul.ll
    M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll

  Log Message:
  -----------
  [X86][AVX] Combine 128/256-bit lane shuffles with zeroable upper subvectors to EXTRACT_SUBVECTOR (PR40720)

As explained on PR40720, EXTRACTF128 is always as good/better than VPERM2F128/SHUF128, and we can use the implicit zeroing of the uppers.


Compare: https://github.com/llvm/llvm-project/compare/8253a86b65c6...9c8ec99c80a5