[all-commits] [llvm/llvm-project] 172456: [Legalizer] Fix some flags miss in vector results

[Qiu Chaofan via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 172456c77506abf8f5a1a7e28db6ea449904ec8e
      https://github.com/llvm/llvm-project/commit/172456c77506abf8f5a1a7e28db6ea449904ec8e
  Author: Qiu Chaofan <qiucofan at cn.ibm.com>
  Date:   2020-03-26 (Thu, 26 Mar 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll

  Log Message:
  -----------
  [Legalizer] Fix some flags miss in vector results

In some scalarize/split result methods (unary, binary, ...), flags in
SDNode were not passed down, which may lead to unexpected results in
unsafe float-point optimization. This patch fixes them. (maybe not
complete)

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D76832