[all-commits] [llvm/llvm-project] 9086db: [AArch64][SVE] Implement structured store intrinsics

Cullen Rhodes via All-commits all-commits at lists.llvm.org
Thu Mar 26 02:35:09 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 9086db707d961f61d427a80ffecb704e5664af82
      https://github.com/llvm/llvm-project/commit/9086db707d961f61d427a80ffecb704e5664af82
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2020-03-26 (Thu, 26 Mar 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll

  Log Message:
  -----------
  [AArch64][SVE] Implement structured store intrinsics

Summary:
This patch adds initial support for the following intrinsics:

    * llvm.aarch64.sve.st2
    * llvm.aarch64.sve.st3
    * llvm.aarch64.sve.st4

For storing two, three and four vectors worth of data. Basic codegen for
reg+immediate forms are implemented. Reg+reg addressing modes will be
addressed in a later patch.

These intrinsics are intended for use in the Arm C Language Extension
(ACLE).

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D75947




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