[all-commits] [llvm/llvm-project] 24698e: Implement wave32 DWARF register mapping
RamNalamothu via All-commits
all-commits at lists.llvm.org
Mon Mar 23 07:24:25 PDT 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 24698e526f619271705fe72bcaa928be9bc82484
https://github.com/llvm/llvm-project/commit/24698e526f619271705fe72bcaa928be9bc82484
Author: Ram Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
Date: 2020-03-23 (Mon, 23 Mar 2020)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
A llvm/unittests/MC/AMDGPU/CMakeLists.txt
A llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/MC/CMakeLists.txt
A llvm/unittests/Target/AMDGPU/CMakeLists.txt
A llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
Log Message:
-----------
Implement wave32 DWARF register mapping
Implement the DWARF register mapping described in llvm/docs/AMDGPUUsage.rst.
This enables generating appropriate DWARF register numbers for wave64 and
wave32 modes.
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