[all-commits] [llvm/llvm-project] 62fdb1: [DAGCombine] Skip PostInc combine with later users

[Sam Parker via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 62fdb1f534b73589187f2dca243c1e30865a734f
      https://github.com/llvm/llvm-project/commit/62fdb1f534b73589187f2dca243c1e30865a734f
  Author: Sam Parker <sam.parker at arm.com>
  Date:   2020-03-23 (Mon, 23 Mar 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/Thumb/frame-access.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/extending-loads.ll
    M llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll

  Log Message:
  -----------
  [DAGCombine] Skip PostInc combine with later users

When decided whether to generate a post-inc load/store, look at the
other memory nodes that use the same base address and, if any proceed
the current node, then don't do the combine.
The change only seems to be affecting the Arm backend, which I was
surprised at, but it appears to fix a lot of our issues around MVE
masked load/stores having to store a temporary address after an early
post-increment on a shared base address.

Differential Revision: https://reviews.llvm.org/D75847