[all-commits] [llvm/llvm-project] 3205d1: [InstCombine] Handle known shl nsw sign bit in Sim...

[Nikita Popov via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 3205d1a860367f7ab77d331f03086eeed194e44c
      https://github.com/llvm/llvm-project/commit/3205d1a860367f7ab77d331f03086eeed194e44c
  Author: Nikita Popov <nikita.ppv at gmail.com>
  Date:   2020-03-20 (Fri, 20 Mar 2020)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/known-signbit-shift.ll

  Log Message:
  -----------
  [InstCombine] Handle known shl nsw sign bit in SimplifyDemanded

Ideally SimplifyDemanded should compute the same known bits as
computeKnownBits(). This patch addresses one discrepancy, where
ValueTracking is more powerful: If we have a shl nsw shift, we
know that the sign bit of the input and output must be the same.
If this results in a conflict, the result is poison.

This is implemented in
https://github.com/llvm-mirror/llvm/blob/2c4ca6832fa6b306ee6a7010bfb80a3f2596f824/lib/Analysis/ValueTracking.cpp#L1175-L1179
and
https://github.com/llvm-mirror/llvm/blob/2c4ca6832fa6b306ee6a7010bfb80a3f2596f824/lib/Analysis/ValueTracking.cpp#L904-L908.

This implements the same basic logic in SimplifyDemanded. It's
slightly stronger, because I return undef instead of zero for the
poison case (which is not an option inside ValueTracking).

As mentioned in https://reviews.llvm.org/D75801#inline-698484,
we could detect poison in more cases, this just establishes parity
with the existing logic.

Differential Revision: https://reviews.llvm.org/D76489