[all-commits] [llvm/llvm-project] 2cbb8c: [AMDGPU] Reuse register during frame index elimina...

[Austin Kerbow via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2cbb8c946a6e89faa61333d3aede503d37551639
      https://github.com/llvm/llvm-project/commit/2cbb8c946a6e89faa61333d3aede503d37551639
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2020-03-20 (Fri, 20 Mar 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
    M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
    M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
    A llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir

  Log Message:
  -----------
  [AMDGPU] Reuse register during frame index elimination

If there were no free VGPRs we would need two emergency spill slots for register
scavenging during PEI/frame index elimination. Reuse 'ResultReg' for scale
calculation so that only one spill is needed.

Differential Revision: https://reviews.llvm.org/D76387