[all-commits] [llvm/llvm-project] a26bd4: [TableGen] Support combining AssemblerPredicates w...

[Simon Cook via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a26bd4ec1652da20872e55d0bf468f52149a2ec9
      https://github.com/llvm/llvm-project/commit/a26bd4ec1652da20872e55d0bf468f52149a2ec9
  Author: Simon Cook <simon.cook at embecosm.com>
  Date:   2020-03-13 (Fri, 13 Mar 2020)

  Changed paths:
    M llvm/include/llvm/MC/MCInstPrinter.h
    M llvm/include/llvm/Target/Target.td
    M llvm/lib/MC/MCInstPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/ARM/ARMPredicates.td
    M llvm/lib/Target/AVR/AVRInstrInfo.td
    M llvm/lib/Target/Hexagon/Hexagon.td
    M llvm/lib/Target/Hexagon/HexagonDepArch.td
    M llvm/lib/Target/Mips/Mips.td
    M llvm/lib/Target/Mips/MipsDSPInstrFormats.td
    M llvm/lib/Target/Mips/MipsInstrFPU.td
    M llvm/lib/Target/Mips/MipsInstrInfo.td
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/Sparc/SparcInstrInfo.td
    M llvm/lib/Target/SystemZ/SystemZFeatures.td
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
    M llvm/lib/Target/X86/X86InstrInfo.td
    A llvm/test/TableGen/AsmPredicateCombining.td
    A llvm/test/TableGen/AsmPredicateCombiningRISCV.td
    M llvm/test/TableGen/AsmPredicateCondsEmission.td
    M llvm/utils/TableGen/AsmWriterEmitter.cpp
    M llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
    M llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
    M llvm/utils/TableGen/SubtargetFeatureInfo.cpp

  Log Message:
  -----------
  [TableGen] Support combining AssemblerPredicates with ORs

For context, the proposed RISC-V bit manipulation extension has a subset
of instructions which require one of two SubtargetFeatures to be
enabled, 'zbb' or 'zbp', and there is no defined feature which both of
these can imply to use as a constraint either (see comments in D65649).

AssemblerPredicates allow multiple SubtargetFeatures to be declared in
the "AssemblerCondString" field, separated by commas, and this means
that the two features must both be enabled. There is no equivalent to
say that _either_ feature X or feature Y must be enabled, short of
creating a dummy SubtargetFeature for this purpose and having features X
and Y imply the new feature.

To solve the case where X or Y is needed without adding a new feature,
and to better match a typical TableGen style, this replaces the existing
"AssemblerCondString" with a dag "AssemblerCondDag" which represents the
same information. Two operators are defined for use with
AssemblerCondDag, "all_of", which matches the current behaviour, and
"any_of", which adds the new proposed ORing features functionality.

This was originally proposed in the RFC at
http://lists.llvm.org/pipermail/llvm-dev/2020-February/139138.html

Changes to all current backends are mechanical to support the replaced
functionality, and are NFCI.

At this stage, it is illegal to combine features with ands and ors in a
single AssemblerCondDag. I suspect this case is sufficiently rare that
adding more complex changes to support it are unnecessary.

Differential Revision: https://reviews.llvm.org/D74338