[all-commits] [llvm/llvm-project] 4e589e: [WebAssembly] Fix SIMD shift unrolling to avoid as...

[Thomas Lively via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 4e589e6c26e3773541deefb94a149fec2f013318
      https://github.com/llvm/llvm-project/commit/4e589e6c26e3773541deefb94a149fec2f013318
  Author: Thomas Lively <tlively at google.com>
  Date:   2020-03-12 (Thu, 12 Mar 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    A llvm/test/CodeGen/WebAssembly/simd-shift-unroll.ll

  Log Message:
  -----------
  [WebAssembly] Fix SIMD shift unrolling to avoid assertion failure

Summary:
Using the default DAG.UnrollVectorOp on v16i8 and v8i16 vectors
results in i8 or i16 nodes being inserted into the SelectionDAG. Since
those are illegal types, this causes a legalization assertion failure
for some code patterns, as uncovered by PR45178. This change unrolls
shifts manually to avoid this issue by adding and using a new optional
EVT argument to DAG.ExtractVectorElements to control the type of the
extract_element nodes.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, zzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76043