[all-commits] [llvm/llvm-project] c0f440: [mlir] Create a std op instead of chain of ops.

hanhanW via All-commits all-commits at lists.llvm.org
Tue Mar 10 15:03:29 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: c0f4408d76f06cc106a257e8a160ec66c5b15025
      https://github.com/llvm/llvm-project/commit/c0f4408d76f06cc106a257e8a160ec66c5b15025
  Author: Hanhan Wang <hanchung at google.com>
  Date:   2020-03-10 (Tue, 10 Mar 2020)

  Changed paths:
    M mlir/lib/Dialect/AffineOps/EDSC/Builders.cpp
    M mlir/test/EDSC/builder-api-test.cpp

  Log Message:
  -----------
  [mlir] Create a std op instead of chain of ops.

Summary:
1-bit integer is tricky in different dialects sometimes. E.g., there is no
arithmetic instructions on 1-bit integer in SPIR-V, i.e., `spv.IMul %0, %1 : i1`
is not valid. Instead, `spv.LogicalAnd %0, %1 : i1` is valid. Creating the op
directly makes lowering easier because we don't need to match a complicated
pattern like `!(!lhs && !rhs)`. Also, this matches the semantic better.

Also add assertions on inputs.

Differential Revision: https://reviews.llvm.org/D75764




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