[all-commits] [llvm/llvm-project] ef4282: [AArch64][GlobalISel] Avoid copies to target regis...

[Jessica Paquette via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ef4282e0ee2d6539bbb92447a7464d9d089409f1
      https://github.com/llvm/llvm-project/commit/ef4282e0ee2d6539bbb92447a7464d9d089409f1
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2020-03-05 (Thu, 05 Mar 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-and-tbz-tbnz.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-shift-tbz-tbnz.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/subreg-copy.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Avoid copies to target register bank for subregister copies

Previously for any copy from a register bigger than the destination:

Copied to a same-sized register in the destination register bank.
Subregister copy of that to the destination.
This fails for copies from 128-bit FPRs to GPRs because the GPR register bank
can't accomodate 128-bit values.

Instead of special-casing such copies to perform the truncation beforehand in
the source register bank, generalize this:
a) Perform a subregister copy straight from source register whenever possible.
This results in shorter MIR and fixes the above problem.

b) Perform a full copy to target bank and then do a subregister copy only if
source bank can't support target's size. E.g. GPR to 8-bit FPR copy.

Patch by Raul Tambre (tambre)!

Differential Revision: https://reviews.llvm.org/D75421