[all-commits] [llvm/llvm-project] 1bacdc: Extend LaneBitmask to 64 bit

[Stanislav Mekhanoshin via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1bacdcf48dd81e32f81ffc7517e84b28ecfa5ac3
      https://github.com/llvm/llvm-project/commit/1bacdcf48dd81e32f81ffc7517e84b28ecfa5ac3
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2020-03-02 (Mon, 02 Mar 2020)

  Changed paths:
    M llvm/include/llvm/MC/LaneBitmask.h
    M llvm/lib/CodeGen/MIRParser/MIParser.cpp
    M llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
    M llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir
    M llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
    M llvm/test/CodeGen/MIR/Hexagon/parse-lane-masks.mir

  Log Message:
  -----------
  Extend LaneBitmask to 64 bit

This is needed for D74873, AMDGPU going to have 16 bit subregs
and the largest tuple is 32 VGPRs, which results in 64 lanes.

Differential Revision: https://reviews.llvm.org/D75378