[all-commits] [llvm/llvm-project] 9fcd21: [X86] Remove isel patterns from broadcast of loadi32.

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 9fcd212e2f678fdbdf304399a1e58ca490dc54d1
      https://github.com/llvm/llvm-project/commit/9fcd212e2f678fdbdf304399a1e58ca490dc54d1
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-02-28 (Fri, 28 Feb 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrAVX512.td
    M llvm/lib/Target/X86/X86InstrSSE.td
    M llvm/test/CodeGen/X86/vector-sext.ll

  Log Message:
  -----------
  [X86] Remove isel patterns from broadcast of loadi32.

We already combine non extending loads with broadcasts in DAG
combine. All these patterns are picking up is the aligned extload
special case. But the only lit test we have that exercsises it is
using v8i1 load that datalayout is reporting align 8 for. That
seems generous. So without a realistic test case I don't think
there is much value in these patterns.