[all-commits] [llvm/llvm-project] 0368b4: [entry values] ARM: Add a describeLoadedValue over...
Vedant Kumar via All-commits
all-commits at lists.llvm.org
Fri Feb 28 14:35:20 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 0368b42295325dc3b3e7deaa72a2db9e2b049df2
https://github.com/llvm/llvm-project/commit/0368b42295325dc3b3e7deaa72a2db9e2b049df2
Author: Vedant Kumar <vsk at apple.com>
Date: 2020-02-28 (Fri, 28 Feb 2020)
Changed paths:
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
A llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
A llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
Log Message:
-----------
[entry values] ARM: Add a describeLoadedValue override (PR45025)
As a narrow stopgap for the assertion failure described in PR45025, add
a describeLoadedValue override to ARMBaseInstrInfo and use it to detect
copies in which the forwarding reg is a super/sub reg of the copy
destination. For the moment this is unsupported.
Several follow ups are possible:
1) Handle VORRq. At the moment, we do not, because isCopyInstrImpl
returns early when !MI.isMoveReg().
2) In the case where forwarding reg is a super-reg of the copy
destination, we should be able to describe the forwarding reg as a
subreg within the copy destination. I'm not 100% sure about this, but
it looks like that's what's done in AArch64InstrInfo.
3) In the case where the forwarding reg is a sub-reg of the copy
destination, maybe we could describe the forwarding reg using the
copy destinaion and a DW_OP_LLVM_fragment (I guess this should be
possible after D75036).
https://bugs.llvm.org/show_bug.cgi?id=45025
rdar://59772698
Differential Revision: https://reviews.llvm.org/D75273
Commit: c54597b99d6f6ea51616168a0c2ff3850c3869eb
https://github.com/llvm/llvm-project/commit/c54597b99d6f6ea51616168a0c2ff3850c3869eb
Author: Vedant Kumar <vsk at apple.com>
Date: 2020-02-28 (Fri, 28 Feb 2020)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.h
M compiler-rt/lib/ubsan/ubsan_checks.inc
M compiler-rt/lib/ubsan/ubsan_handlers.cpp
M compiler-rt/test/ubsan/TestCases/Misc/nullability.c
Log Message:
-----------
[ubsan] Add support for -fsanitize=nullability-* suppressions
rdar://59402904
Compare: https://github.com/llvm/llvm-project/compare/52f889abecc7...c54597b99d6f
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