[all-commits] [llvm/llvm-project] fa9439: [AArch64][SVE] Add intrinsics for first-faulting g...

[Andrzej Warzyński via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: fa9439fac84ea4eb4050aa1ae150c0ec2cf86c20
      https://github.com/llvm/llvm-project/commit/fa9439fac84ea4eb4050aa1ae150c0ec2cf86c20
  Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
  Date:   2020-02-27 (Thu, 27 Feb 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll

  Log Message:
  -----------
  [AArch64][SVE] Add intrinsics for first-faulting gather loads

Summary:
The following intrinsics are added:
  * @llvm.aarch64.sve.ldff1.gather
  * @llvm.aarch64.sve.ldff1.gather.index
  * @llvm.aarch64.sve.ldff1.gather_sxtw
  * @llvm.aarch64.sve.ldff1.gather.uxtw
  * @llvm.aarch64.sve.ldff1.gather_sxtw.index
  * @llvm.aarch64.sve.ldff1.gather.uxtw.index
  * @llvm.aarch64.sve.ldff1.gather.scalar.offset

Although this patch is quite substantial, the vast majority of the
implementation is just a 'copy & paste' of the implementation of regular
gather loads, including tests. There's only a handful of new
definitions:
  * AArch64ISD nodes defined in AArch64ISelLowering.h (e.g. GLDFF1)
  * Seleciton DAG Types in AArch64SVEInstrInfo.td (e.g.
    AArch64ldff1_gather)
  * intrinsics in IntrinsicsAArch64.td (e.g. aarch64_sve_ldff1_gather)
  * Pseudo instructions in SVEInstrFormats.td to workaround the issue of
    use-before-def for the FFR register.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D75128