[all-commits] [llvm/llvm-project] e58229: [ARM] Add CPSR as an implicit use of t2IT
Sam Parker via All-commits
all-commits at lists.llvm.org
Thu Feb 27 02:14:08 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: e58229fded0407f3e4f77cd87bedcd4d35bb7c89
https://github.com/llvm/llvm-project/commit/e58229fded0407f3e4f77cd87bedcd4d35bb7c89
Author: Sam Parker <sam.parker at arm.com>
Date: 2020-02-27 (Thu, 27 Feb 2020)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/test/CodeGen/ARM/constant-islands-split-IT.mir
M llvm/test/CodeGen/ARM/tail-dup-bundle.mir
M llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir
M llvm/test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cmplx_cong.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-ignore-vctp.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/extract-element.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-16.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-32.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-8.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-chain.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-itercount.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-mov.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-random.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/massive.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/multiblock-massive.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec-cbnz.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec-reorder.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-vpsel-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-load.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-store.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-non-header.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/switch.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unrolled-and-vector.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-def.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subi3.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri12.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp16-reduce.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-liveout-lsr-shift.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir
M llvm/test/CodeGen/Thumb2/constant-islands-cbz.mir
M llvm/test/CodeGen/Thumb2/t2-teq-reduce.mir
Log Message:
-----------
[ARM] Add CPSR as an implicit use of t2IT
This use is already attached to the BUNDLE instruction but is lost
after finalisation.
Differential Revision: https://reviews.llvm.org/D75186
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