[all-commits] [llvm/llvm-project] 65f99b: [AArch64][GlobalISel] Fixup <32b heterogeneous reg...

[AE via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 65f99b5383ff3293881f59dd64cfb596c3d03aa4
      https://github.com/llvm/llvm-project/commit/65f99b5383ff3293881f59dd64cfb596c3d03aa4
  Author: Amara Emerson <aemerson at apple.com>
  Date:   2020-02-26 (Wed, 26 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Fixup <32b heterogeneous regbanks of G_PHIs just before selection.

Since all types <32b on gpr end up being assigned gpr32 regclasses, we can end
up with PHIs here which try to select between a gpr32 and an fpr16. Ideally RBS
shouldn't be selecting heterogenous regbanks for operands if possible, but we
still need to be able to deal with it here.

To fix this, if we have a gpr-bank operand < 32b in size and at least one other
operand is on the fpr bank, then we add cross-bank copies to homogenize the
operand banks. For simplicity the bank that we choose to settle on is whatever
bank the def operand has. For example:

%endbb:
  %dst:gpr(s16) = G_PHI %in1:gpr(s16), %bb1, %in2:fpr(s16), %bb2
 =>
%bb2:
  ...
  %in2_copy:gpr(s16) = COPY %in2:fpr(s16)
  ...
%endbb:
  %dst:gpr(s16) = G_PHI %in1:gpr(s16), %bb1, %in2_copy:gpr(s16), %bb2

Differential Revision: https://reviews.llvm.org/D75086