[all-commits] [llvm/llvm-project] 9eb3cc: [ARM, MVE] Add predicated intrinsics for many unary...

[Simon Tatham via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 9eb3cc10b2c6f78ccf033cb264113fc904651cd0
      https://github.com/llvm/llvm-project/commit/9eb3cc10b2c6f78ccf033cb264113fc904651cd0
  Author: Simon Tatham <simon.tatham at arm.com>
  Date:   2020-02-26 (Wed, 26 Feb 2020)

  Changed paths:
    M clang/include/clang/Basic/arm_mve.td
    M clang/include/clang/Basic/arm_mve_defs.td
    M clang/test/CodeGen/arm-mve-intrinsics/absneg.c
    M clang/test/CodeGen/arm-mve-intrinsics/vclz.c
    M clang/test/CodeGen/arm-mve-intrinsics/vcvt.c
    M clang/test/CodeGen/arm-mve-intrinsics/vmovl.c
    M clang/test/CodeGen/arm-mve-intrinsics/vmovn.c
    M clang/test/CodeGen/arm-mve-intrinsics/vrev.c
    M clang/test/CodeGen/arm-mve-intrinsics/vrnd.c
    M llvm/include/llvm/IR/IntrinsicsARM.td
    M llvm/lib/Target/ARM/ARMInstrMVE.td
    A llvm/test/CodeGen/Thumb2/mve-intrinsics/absneg-predicated.ll
    A llvm/test/CodeGen/Thumb2/mve-intrinsics/vclzcls-predicated.ll
    A llvm/test/CodeGen/Thumb2/mve-intrinsics/vcvt-fp-int.ll
    M llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovl.ll
    M llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovn.ll
    A llvm/test/CodeGen/Thumb2/mve-intrinsics/vrev.ll
    A llvm/test/CodeGen/Thumb2/mve-intrinsics/vrint-predicated.ll

  Log Message:
  -----------
  [ARM,MVE] Add predicated intrinsics for many unary functions.

Summary:
This commit adds the predicated MVE intrinsics for the same set of
unary operations that I added in their unpredicated forms in

* D74333 (vrint)
* D74334 (vrev)
* D74335 (vclz, vcls)
* D74336 (vmovl)
* D74337 (vmovn)

but since the predicated versions are a lot more similar to each
other, I've kept them all together in a single big patch. Everything
here is done in the standard way we've been doing other predicated
operations: an IR intrinsic called `@llvm.arm.mve.foo.predicated` and
some isel rules that match that alongside whatever they accept for the
unpredicated version of the same instruction.

In order to write the isel rules conveniently, I've refactored the
existing isel rules for the affected instructions into multiclasses
parametrised by a vector-type class, in the usual way. All those
refactorings are intended to leave the existing isel rules unchanged:
the only difference should be that new ones for the predicated
intrinsics are introduced.

The only tiny infrastructure change I needed in this commit was to
change the implementation of `IntrinsicMX` in `arm_mve_defs.td` so
that the records it defines are anonymous rather than named (and use
`NameOverride` to set the output intrinsic name), which allows me to
call it twice in two multiclasses with the same `NAME` without a
tablegen-time error.

Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard

Reviewed By: MarkMurrayARM

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D75165