[all-commits] [llvm/llvm-project] 425ef9: [NFC][InstCombine] Add shift amount reassociation ...

[Roman Lebedev via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 425ef999385058143bb927aefe81daddcd43f623
      https://github.com/llvm/llvm-project/commit/425ef999385058143bb927aefe81daddcd43f623
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2020-02-25 (Tue, 25 Feb 2020)

  Changed paths:
    M llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll

  Log Message:
  -----------
  [NFC][InstCombine] Add shift amount reassociation miscompile example from PR44802

https://bugs.llvm.org/show_bug.cgi?id=44802


  Commit: 781d077afb0ed9771c513d064c40170c1ccd21c9
      https://github.com/llvm/llvm-project/commit/781d077afb0ed9771c513d064c40170c1ccd21c9
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2020-02-25 (Tue, 25 Feb 2020)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
    M llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll

  Log Message:
  -----------
  [InstCombine] reassociateShiftAmtsOfTwoSameDirectionShifts(): fix miscompile (PR44802)

As input, we have the following pattern:
  Sh0 (Sh1 X, Q), K
We want to rewrite that as:
  Sh x, (Q+K)  iff (Q+K) u< bitwidth(x)
While we know that originally (Q+K) would not overflow
(because  2 * (N-1) u<= iN -1), we may have looked past extensions of
shift amounts. so it may now overflow in smaller bitwidth.

To ensure that does not happen, we need to ensure that the total maximal
shift amount is still representable in that smaller bitwidth.
If the overflow would happen, (Q+K) u< bitwidth(x) check would be bogus.

https://bugs.llvm.org/show_bug.cgi?id=44802


  Commit: 6f807ca00d951d3e74f7ea4fe1daa8e3560f4c0d
      https://github.com/llvm/llvm-project/commit/6f807ca00d951d3e74f7ea4fe1daa8e3560f4c0d
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2020-02-25 (Tue, 25 Feb 2020)

  Changed paths:
    M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll

  Log Message:
  -----------
  [NFC][InstCombine] Add shift amount reassociation in bittest miscompile example from PR44802

https://bugs.llvm.org/show_bug.cgi?id=44802


  Commit: 2855c8fed9326ec44526767f1596a4fe4e55dc70
      https://github.com/llvm/llvm-project/commit/2855c8fed9326ec44526767f1596a4fe4e55dc70
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2020-02-25 (Tue, 25 Feb 2020)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll

  Log Message:
  -----------
  [InstCombine] foldShiftIntoShiftInAnotherHandOfAndInICmp(): fix miscompile (PR44802)

Much like with reassociateShiftAmtsOfTwoSameDirectionShifts(),
as input, we have the following pattern:
  icmp eq/ne (and ((x shift Q), (y oppositeshift K))), 0
We want to rewrite that as:
  icmp eq/ne (and (x shift (Q+K)), y), 0  iff (Q+K) u< bitwidth(x)

While we know that originally (Q+K) would not overflow
(because  2 * (N-1) u<= iN -1), we may have looked past extensions of
shift amounts. so it may now overflow in smaller bitwidth.

To ensure that does not happen, we need to ensure that the total maximal
shift amount is still representable in that smaller bitwidth.
If the overflow would happen, (Q+K) u< bitwidth(x) check would be bogus.

https://bugs.llvm.org/show_bug.cgi?id=44802


Compare: https://github.com/llvm/llvm-project/compare/fc466f87804f...2855c8fed932