[all-commits] [llvm/llvm-project] 29ad9d: [mlir][spirv] Add lowering for load/store zero-ran...

[hanhanW via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 29ad9d6b26ee92c7843c06392625d894d58658c2
      https://github.com/llvm/llvm-project/commit/29ad9d6b26ee92c7843c06392625d894d58658c2
  Author: Hanhan Wang <hanchung at google.com>
  Date:   2020-02-21 (Fri, 21 Feb 2020)

  Changed paths:
    M mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
    M mlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir
    M mlir/test/Dialect/SPIRV/Serialization/memory-ops.mlir

  Log Message:
  -----------
  [mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V.

Differential Revision: https://reviews.llvm.org/D74874