[all-commits] [llvm/llvm-project] 043ed2: AMDGPU/GlobalISel: Fix xnor matching

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 043ed2e22ac442c2116f5df6367d3889ea0b9de1
      https://github.com/llvm/llvm-project/commit/043ed2e22ac442c2116f5df6367d3889ea0b9de1
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-21 (Fri, 21 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix xnor matching

We should try the generated matchers before the manual selection. This
means the patterns are now handling the common cases, but the manual
selection code is not yet dead. It's still handling the non-s32/s64
cases (like v2s16 and v2s32). Currently tablegen doesn't have a nice
way to have a single pattern that covers multiple types.


  Commit: 6a479220b5e8b25ec3ffe193c463cb3fdaac0e06
      https://github.com/llvm/llvm-project/commit/6a479220b5e8b25ec3ffe193c463cb3fdaac0e06
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-21 (Fri, 21 Feb 2020)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Commit test changes I forgot to squash

These should have been in ac7abe0ba9ae4c6a2248cc3ef4e4fe7e6d270105


Compare: https://github.com/llvm/llvm-project/compare/42ec6fdce920...6a479220b5e8