[all-commits] [llvm/llvm-project] ce70e2: [AArch64][SVE] Add intrinsics for SVE2 bitwise ter...

[dancgr via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ce70e2899879e092b153a4078b993833b6696713
      https://github.com/llvm/llvm-project/commit/ce70e2899879e092b153a4078b993833b6696713
  Author: Danilo Carvalho Grael <danilo.carvalho.grael at huawei.com>
  Date:   2020-02-20 (Thu, 20 Feb 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve2-bitwise-ternary.ll

  Log Message:
  -----------
  [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations

Summary:
Add intrinsics for the following operations:
- eor3, bcax
- bsl, bsl1n, bsl2n, nbsl

Reviewers: kmclaughlin, c-rhodes, sdesmalen, efriedma, rengolin

Reviewed By: efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74785