[all-commits] [llvm/llvm-project] de3e65: [ARM][LowOverheadLoops] Check loop liveouts

[Sam Parker via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: de3e65e60c8a28c70df7fc23376a0683a004b30f
      https://github.com/llvm/llvm-project/commit/de3e65e60c8a28c70df7fc23376a0683a004b30f
  Author: Sam Parker <sam.parker at arm.com>
  Date:   2020-02-19 (Wed, 19 Feb 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/extract-element.mir
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/livereg-no-loop-def.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/multiple-do-loops.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-vpsel-liveout.mir
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout.mir
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp16-reduce.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-liveout-lsr-shift.mir
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir
    A llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir

  Log Message:
  -----------
  [ARM][LowOverheadLoops] Check loop liveouts

Check that no Q-regs are live out of the loop, unless the instruction
within the loop is predicated on the vctp.

Differential Revision: https://reviews.llvm.org/D72713