[all-commits] [llvm/llvm-project] 5171d1: [MIPS GlobalISel] Select 4 byte unaligned load and...
petar-avramovic via All-commits
all-commits at lists.llvm.org
Wed Feb 19 02:57:39 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 5171d1523dd853117d0df080850d1c77c63d0e76
https://github.com/llvm/llvm-project/commit/5171d1523dd853117d0df080850d1c77c63d0e76
Author: Petar Avramovic <Petar.Avramovic at rt-rk.com>
Date: 2020-02-19 (Wed, 19 Feb 2020)
Changed paths:
M llvm/lib/Target/Mips/MipsInstructionSelector.cpp
M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
A llvm/test/CodeGen/Mips/GlobalISel/instruction-select/load_4_unaligned.mir
A llvm/test/CodeGen/Mips/GlobalISel/instruction-select/load_4_unaligned_r6.mir
A llvm/test/CodeGen/Mips/GlobalISel/instruction-select/store_4_unaligned.mir
A llvm/test/CodeGen/Mips/GlobalISel/instruction-select/store_4_unaligned_r6.mir
A llvm/test/CodeGen/Mips/GlobalISel/legalizer/load_4_unaligned.mir
A llvm/test/CodeGen/Mips/GlobalISel/legalizer/store_4_unaligned.mir
A llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_4_unaligned.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll
A llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll
A llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load_4_unaligned.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/phi.mir
A llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store_4_unaligned.mir
Log Message:
-----------
[MIPS GlobalISel] Select 4 byte unaligned load and store
Improve legality checks for load and store, 4 byte scalar
load and store are now legal for all subtargets.
During regbank selection 4 byte unaligned loads and stores
for MIPS32r5 and older get mapped to gprb.
Select 4 byte unaligned loads and stores for MIPS32r5.
Fix tests that unintentionally had unaligned load or store.
Differential Revision: https://reviews.llvm.org/D74624
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