[all-commits] [llvm/llvm-project] 1ab37f: [InstCombine] Fix worklist management when simplif...

[Nikita Popov via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1ab37fad61ab3b44bdb11b6865925321fccb7947
      https://github.com/llvm/llvm-project/commit/1ab37fad61ab3b44bdb11b6865925321fccb7947
  Author: Nikita Popov <nikita.ppv at gmail.com>
  Date:   2020-02-18 (Tue, 18 Feb 2020)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/pr44541.ll
    M llvm/test/Transforms/InstCombine/select-imm-canon.ll

  Log Message:
  -----------
  [InstCombine] Fix worklist management when simplifying demanded bits

When simplifying demanded bits, we currently only report the
instruction on which SimplifyDemandedBits was called as changed.
However, this is a recursive call, and the actually modified
instruction will usually be further up the chain. Additionally,
all the intermediate instructions should also be revisited,
as additional combines may be possible after the demanded bits
simplification. We fix this by explicitly adding them back to the
worklist.

Differential Revision: https://reviews.llvm.org/D72944