[all-commits] [llvm/llvm-project] 3f7649: [X86] Move combineIncDecVector logic from Select t...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 3f7649799bedfaa97ced81c95414af23174f811e
      https://github.com/llvm/llvm-project/commit/3f7649799bedfaa97ced81c95414af23174f811e
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-02-15 (Sat, 15 Feb 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
    M llvm/test/CodeGen/X86/avx512-arith.ll

  Log Message:
  -----------
  [X86] Move combineIncDecVector logic from Select to PreprocessISelDAG.

This allows it to work properly with masked inc/dec for avx512. Those
would have a vselect as the root node so didn't get a chance to call
combineIncDecVector.

This also simplifies the logic because we don't have to manage
the topological ordering.