[all-commits] [llvm/llvm-project] ff307c: [X86] combineFneg - generalize FMA negations with ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ff307c8120ecca89193576c38d68a0353ea49e8b
      https://github.com/llvm/llvm-project/commit/ff307c8120ecca89193576c38d68a0353ea49e8b
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-02-12 (Wed, 12 Feb 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/horizontal-reduce-umax.ll
    M llvm/test/CodeGen/X86/horizontal-reduce-umin.ll
    M llvm/test/CodeGen/X86/vector-reduce-umax.ll
    M llvm/test/CodeGen/X86/vector-reduce-umin.ll

  Log Message:
  -----------
  [X86] combineFneg - generalize FMA negations with isNegatibleForFree/getNegatedExpression

This has a really interesting side effect in that it improves some UMAX/UMIN reduction code which had redundant XOR(SHUFFLE(XOR(X,SIGNMASK)),SIGNMASK) patterns - the getNegatibleCost recognises it as FNEG(SHUFFLE(FNEG(X))).... We have a lot of FNEG patterns bitcasted to the integer domain for XOR signbit twiddling which is similar to what we do to allow UMAX/UMIN to be lowered using SMAX/SMIN.

Differential Revision: https://reviews.llvm.org/D74231