[all-commits] [llvm/llvm-project] b413e5: [PowerPC] Add support for intrinsics llvm.ppc.dcbf...

[stefanp-ibm via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b413e5c3097cb842266d9c33e9737ac6cc252903
      https://github.com/llvm/llvm-project/commit/b413e5c3097cb842266d9c33e9737ac6cc252903
  Author: Anil Mahmud <Anil.Mahmud at ibm.com>
  Date:   2020-02-12 (Wed, 12 Feb 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/test/CodeGen/PowerPC/dcbf.ll

  Log Message:
  -----------
  [PowerPC] Add support for intrinsics llvm.ppc.dcbfl and llvm.ppc.dcbflp

Added support for the intrinsic llvm.ppc.dcbfl and llvm.ppc.dcbflp.
These will be used for emitting cache control instructions dcbfl and dcbflp
which are actually mnemonics for using dcbf instruction with different
immediate arguments.

dcbfl ra, rb -> dcbf ra, rb, 1
dcbflp, ra, rb -> dcbf ra, rb, 3

Differential Revision: https://reviews.llvm.org/D68411


  Commit: ab4d60642142b369557adc83c9c51cec01b4b213
      https://github.com/llvm/llvm-project/commit/ab4d60642142b369557adc83c9c51cec01b4b213
  Author: Anil Mahmud <Anil.Mahmud at ibm.com>
  Date:   2020-02-12 (Wed, 12 Feb 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    A llvm/test/CodeGen/PowerPC/eieio.ll

  Log Message:
  -----------
  [PowerPC] Add support for intrinsic llvm.ppc.eieio

Add support for the intrinsic llvm.ppc.eieio to emit the instruction eieio.

Differential Revision: https://reviews.llvm.org/D69066


Compare: https://github.com/llvm/llvm-project/compare/b99f45574c99...ab4d60642142