[all-commits] [llvm/llvm-project] 29621b: [X86] Rename matchShuffleAsRotate - matchShuffleAs...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 29621b2534658426128ec30455db98c105964c51
      https://github.com/llvm/llvm-project/commit/29621b2534658426128ec30455db98c105964c51
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-02-09 (Sun, 09 Feb 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] Rename matchShuffleAsRotate - matchShuffleAsByteRotate. NFCI.

A matchShuffleAsBitRotate variant will be added soon and we need to make the difference more obvious.


  Commit: 22780731255020ce78cf3671a4af94c4a2e9ac03
      https://github.com/llvm/llvm-project/commit/22780731255020ce78cf3671a4af94c4a2e9ac03
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-02-09 (Sun, 09 Feb 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
    M llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
    M llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll

  Log Message:
  -----------
  [X86][SSE] Add more tests showing failure to lower shuffles as bit rotations


  Commit: 0ae119f83560c694d6b1f17e32dc7a6b8be16bc1
      https://github.com/llvm/llvm-project/commit/0ae119f83560c694d6b1f17e32dc7a6b8be16bc1
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-02-09 (Sun, 09 Feb 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
    M llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll

  Log Message:
  -----------
  [X86][XOP] Add XOP target to vXi16/vXi8 shuffle tests

Helps with bit rotation test coverage for PR44379


Compare: https://github.com/llvm/llvm-project/compare/9d223a0106d0...0ae119f83560